Low Voltage High Current Rectification Topology Engineering Essay

In Microprocessor and telecommunication applications, the system operation velocity and integrating denseness every bit good as power degree demand continue to increase, ensuing in decreased supply electromotive force and increased supply current.The half span DC-DC convertor with Current Tripler Rectifier ( CTR ) is a good campaigner topology for high-current low-tension applications. Current Tripler Rectifier is favourable compared to the conventional center-tapped and Current Doubler Rectifiers, because three secondary filter inductances portion load current and therefore heighten end product current capableness and thermic direction. With CTR topology, lower conductivity loss and well-distributed power dissipation to better overall transition efficiency and fulfill thermic direction demand.

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1.INTRODUCTION

The development in Microprocessor technoA­A­A­A­logy poses new challenges for providing power to these devices. Nano engineering is driving VLSI circuits in a way of greater transistor integrating, faster clock frequence, and lower operation electromotive force. In order to run into faster and more efficient information processing demands, modern Microprocessors are being designed with lower electromotive force and higher current.. Due to the limited existent estate, high power-density power transition is demanded for Microprocessor and telecommunication applications. In general, transition efficiency and thermic direction are two limitations against high power denseness. High switching frequence operation is an effectual manner to better power denseness, and topologies having high efficiency at high shift frequence are desirable. In add-on, topologies with even current and thermic emphasiss are demanded, particularly for low electromotive force and high current applications. Because secondary-side conductivity loss dominates the overall power loss in stray low-tension high-current DC-DC convertors [ 4 ] – [ 7 ] , secondary-side topologies with low conductivity loss and well-distributed power dissipation are desirable to better overall transition efficiency and thermic management.The half span DC-DC convertor with Current Tripler Rectifier ( CTR ) is a good campaigner topology for high-current low-tension applications. Current Tripler Rectifier is favourable compared to the conventional center-tapped and Current Doubler Rectifiers, because three secondary filter inductances portion load current and therefore heighten end product current capableness and thermic direction. With CTR topology, lower conductivity loss can be achieved and printed circuit board layout design is easier to optimise. Half Bridge ( HB ) topology is suited for low-voltage applications, because it provides dual step-down ratio by spliting the input electromotive force through two input capacitances and transformer use is good. In add-on, a incorporate steady-state state-space theoretical account and analysis is presented for both the symmetrical and asymmetrical controlled half span current tripler rectifier. Based on the derived theoretical account, DC analysis and design considerations are presented.

2. PROPOSED RECTIFICATION TOPOLOGY

2.1 Current Tripler Rectification Topology

The steady province operation of the Half Bridge Current Tripler topology and its operating wave forms are given in below. The incorporate province infinite theoretical account is derived and its major characteristics discussed and compared with current doubler topology. The Half Bridge Current Tripler Rectifier topology is shown in Fig 1. Half Bridge Current Tripler Rectifier topology can be operated as symmetrical Half Bridge Current Tripler Rectifier topology or asymmetrical Half Bridge Current Tripler Rectifier topology. Here Symmetrical half span topology is used. The cardinal steady-state operation wave forms of symmetrical half span current tripler rectifier are shown in Fig 6 The operation rule of the symmetrical half span current tripler rectifier can be described by four operation manners as shown in below.

The primary AC electromotive force pulsation can be generated by state-of-the-art topologies such as push-pull, half span and full span primary-side topologies. Here symmetrical half span primary topology and current tripler secondary are used. The transformer turns ratio is n: 1:1 as labeled, and harmonizing to volt-second balance across the inductances, the end product electromotive force is obtained in footings of responsibility rhythm and input electromotive force.

Vo = ( 0?D?0.5 ) ( 1 )

Where Vin is the input electromotive force, and D is the steady-state responsibility rhythm value. The DC electromotive force addition of the above current tripler rectifier is the same for both the center-tapped and the current doubler rectification topologies. It can be seen, that by taking either the inductance L3, or by taking both the inductances L1 and L2 from the given topology [ 1 ] , these several conventional topologies can be obtained. Neglecting the inductance current rippling, each inductance ‘s DC current is one tierce of the burden current.

I1=I2=I3=Io/3 ( 2 )

Where Io is the burden current. If the applied AC pulsation is perfectly symmetrical, the DC prejudice of the transformer ‘s magnetizing current is nothing. IM =0.









2.2 PRINCIPLE OF OPERATION

The operation rule of the current tripler rectifier can be described by four operation manners as shown in Fig 2, given that symmetrical AC pulse signal is applied to the primary side of the transformer. For this description of circuit operation, the undermentioned premises are made.

  • The convertor operates in steady province.
  • Components are considered ideal except otherwise indicated.
  • Escape induction Lk is neglected.
  • The secondary synchronal rectifiers are considered as ideal rectifying tubes.



Mode 1 ( to & lt ; t & lt ; thallium )At t0, the positive electromotive force Vin is applied to the primary side of transformer. Switch SR1 is turned off and SR2 is on asshown in Fig 2. The inductance L1 is linearly charged by electromotive force ( ( 2Vin/n ) -Vo ) , and in the inductance L1 current i1 linearly additions at the incline

Where Vo is the end product electromotive force and N is the transformer ‘s bends ratio. The inductance L3 is linearly charged by electromotive force difference between the reflected input electromotive force in the secondary side and the end product electromotive force, and inductance current i3 is increasing with the incline.

During this interval, inductance L2 is discharged by the end product electromotive force Vo. The inductance current i2 freewheels through end product capacitance and SR2, and decreases linearly at the following incline:

Mode 2 ( t1 & lt ; t & lt ; t2 )The transformer primary-side is shorted or opened harmonizing to the operation and control of the primary-side topology at t1. Switches SR1 and SR2 are ON to supply drifting way for the three filter inductance currents as shown in Fig 3. Three end product inductances L1, L2 and L3 are all linearly discharged by the end product electromotive force V0, and the three inductance currents lessening at the incline as follows:

Fig 3 Mode2 of Half Bridge Current Tripler Rectifier

Mode 3 ( t2 & lt ; t & lt ; t3 ) At t2, the negative electromotive force -Vin is applied to the primary-side of the transformer. Switch SR1 is ON and SR2 is turned OFF as shown in Fig 4. The inductance L1 is linearly discharged by the end product electromotive force Vo, and the inductance L1 current i1 freewheels and lessenings at the following incline

The inductance L3 is linearly charged by difference electromotive force ( ( Vin/n ) -Vo ) , and increases with the incline

4 Mode3 of Half Bridge Current Tripler Rectifier

Mode 4 ( t3 & lt ; t & lt ; t4 ) At t3, the transformer primary side electromotive force becomes zero, and it repeats the same freewheeling manner as described in Mode 2 until the clip instant t4 as shown in Fig5. The three inductance currents lessening with the following incline as

Fig 5 Mode4 of Half Bridge Current Tripler Rectifier

The operation manner goes back to Mode 1 after this manner, and a new switch rhythm starts. The operating Waveforms of all these manners are shown in below Fig 6.

Fig 6 Symmetrical Half Bridge Current Tripler Rectifier Key Waveforms in Steady-State Operation

2.3. Averaged State-Space Model and DC Analysis of the Proposed Topology

Before deducing the averaged state-space theoretical account, the undermentioned premises are made. The transformer escape induction is neglected. The transformer magnetizing induction is referred to the primary-side, and the convertor operates in CCM manner due to synchronal rectification. Ron1, Ron2 are the on-resistance of the switches S1 and S2 severally. RSR1, RSR2 are the on-resistance of the switches SR1 and SR2 respectively.RL1, RL2 and RL3 are inductor DCR values. Rt is weaving opposition of transformer primary-side. Rc is the ESR ( Equivalent Series Resistance ) of the end product capacitance. S1 gate signal and SR1 gate signal are complementary, and gate signals of S2 and SR2 are complementary.

For each manner during the period of clip, the convertor can be denoted utilizing a set of additive state-space equations.

Where Io is the convertor end product current, D1 and D2 are steady-state responsibility rhythm values for S1 and S2, severally. For symmetrical Half span operation D1=D2. From Eqn ( 27 ) – Eqn ( 30 ) , we may reason:

  1. Transformer primary twist DCR, and the ON-resistance of both primary-side and secondary-side switches have no consequence on the DC current prejudice.
  2. Asymmetrical steady-state responsibility rhythm values consequences in the DC prejudice of transformer magnetising current.
  3. Capacitance and induction of the convertor have no impact on the DC steady-state solutions. Actually, electrical capacity and induction values merely affect electromotive force and current ripplings.
  4. Each inductance carries one tierce of the burden current, and even current distribution can be achieved by circuit symmetricalness and optimized design.



3. Major Features and Comparison With Conventional Rectification Topologies

The given CTR topology [ 1 ] can be used with double-ended primary-side topologies such as push-pull, half span and full span. There is no difference between the current tripler rectifier and the conventional center-tapped and current doubler rectifiers in footings of the control and operation of the primary-side topologies. In add-on, the drive signals for the secondary side Synchronous Rectifiers ( SR ) are indistinguishable to those for the conventional center-tapped and current doubler rectifiers. In the given topology, there are three end product inductances equally sharing the burden current and therefore the current emphasis is relieved in high current applications. As a consequence, the inductances design is simplified and better thermic direction can be achieved.

Detailed comparing between the given topology [ 1 ] and the conventional center-tapped and current-doubler rectifiers is shown in Table 1. For just comparing, assume that three rectifiers operate with the same shift frequence and have the indistinguishable input and end product electromotive forces, every bit good as equal burden currents and end product rippling currents. Current values in Table 1 are non reflecting the consequence of the AC constituents in the inductance currents for the intent of simpleness.

  • The design of the primary-side circuits, transformer and synchronal rectifiers are the same for the three compared rectification topologies.
  • One of the distinguishable characteristics for the current tripler rectifier is its better current distribution and possible lower power dissipation across the power train, which alleviates troubles in thermic direction and packaging for high current applications, which leads to potentially increased power denseness.
  • Since the burden current is equally shared by three independent end product inductances as shown in Table 1, the topology given in the mention paper [ 1 ] has the lowest entire inductance Cu loss as compared with the center-tapped and the current doubler rectifier given indistinguishable DC opposition for each inductance.
  • Another advantage of the given rectification technique is the simplest magnetic design for inductances because of the decrease in the DC current.
  • Besides, the current tripler rectifier has better transformer use and lower transformer weaving conductivity loss than the center-tapped rectification in that the secondary twist in the given rectifier is used all over the switch rhythm and lone carries partial burden current when carry oning. As shown in Table 1, transformer secondary twist RMS current in the current tripler rectifier is besides lower than that in the center-tapped rectifier.
  • Since the physical size of the magnetic nucleus is relative to the energy stored in it ( 1/2*I2*L ) , the entire volume of three inductances should be the same as that of the current doubler rectifier and the center-tapped rectifier. For distinct magnetic attack, the single inductance size is reduced, which makes PCB layout design more flexible.





Therefore, compared to the center-tapped rectifier and the current doubler rectifier, the current tripler topology has high current capableness, well-distributed power dissipation and good thermic direction for high current applications.

4. EXPERIMENTAL RESULTS

An experimental paradigm of the symmetrical half bridgedc-dc convertor with the proposed current tripler rectifier is built. with the nominal input electromotive force 48 V, end product electromotive force 1 V, and maximal load current of 45 A. Core ER14.5/3F3 is selected as the planar transformer with bends ratio of 12:1:1. The convertor runs at the exchanging frequence of 211 kilohertzs. Each end product inductance has an induction value of 0.8 H and DCR value of 0.588 m. It is observed that the burden current is equally distributed in the three inductances. Removing the inductance from the proposed topology, the convertor becomes the conventional half span dc-dc convertor with the current doubler synchronal rectifier. Fig. 11 compares the efficiency curves between the proposed CTR rectifier and the conventional current doubler rectifier at 48 V, which are measured with the same primary-side half span dc-dc convertor, severally. It can be noticed that the current triper rectifier achieves up to 1.5 % efficiency betterment over the current doubler rectifier at 45 A burden, which verifies that the proposed topology is advantageous over the conventional current doubler rectifier. Noting that the efficiency betterment additions with the burden current in Fig. 11, it verifies that the proposed current tripler rectifier is more suited for high current applications than the current doubler rectifier and important efficiency betterment is expected for higher end product current.

5. Decision

44The CTR topology is proposed for high current applications. Theoretical analysis, Comparison, and experimental consequences verify that the proposed rectification technique has good thermic direction and well-distributed power dissipation, simplified magnetic design, and low Cu loss for inductances and transformer due to the fact that the burden current is shared by three inductances and the rms current in transformer twists is reduced. Therefore, the proposed CTR is a good campaigner topology for secondary-side rectification in low electromotive force high current dc-dc convertors

6. Reference

  1. R Liangbin Yao, Hong Mao, and Issa E. Batarseh, “ A rectification topology for high-current stray DC-DC convertors ” , IEEE Trans. Power Electron. , vol. 22, NO. 4, pp. 1522-1530, Jul. 2007.
  2. L. Yao, H. Mao, and I. Batarseh, “ A fresh current tripler rectification topology for stray dc-dc convertors in high current applications, ” in Proc. 41st Annu. Meeting Ind. Appl. Conf. ( IAS’06 ) , vol. 5, pp. 2546-2553, Oct. 2006.
  3. Xunwei Zhou, Peng Xu, and Fred C. Lee, “ A Novel Current-Sharing Control Technique for Low-Voltage High-Current Voltage Regulator Module Applications ” IEEE Trans. Power Electron. , vol.15, no. 6, pp. 1153 – 1162, Nov. 2000.
  4. Y. Panov and M. M. Jovanovic, “ Design and public presentation rating of lowA­ voltage/high-current dc/dc on-board faculties, ” IEEE Trans. Power Electron. , vol. 16, no. 1, pp. 26-33, Jan. 2001.
  5. L. Balogh, “ The current-doubler rectifier: An alternate rectification technique for push-pull and span convertors, ” Unitrode Design Note DN-63, pp. 1-3, 1994.
  6. L. Balogh, “ The public presentation of the current doubler rectifier with synchronal rectification, ” in Proc. High Freq. Power Conv. Conf. , pp. 2 16-225, May 1995.
  7. P. Due, M. Ye, P. Wong, and F. C. Lee, “ Design of 48V electromotive force regulator faculties with a novel integrated magnetisms, ” IEEE Trans. Power Electron. , vol. 17, no. 6, pp. 990-998, Nov. 2002.
  8. P. Alou, J. A. Oliver, O. Garcia, R. Pried, and J. A. Cob ‘s, “ Comparison of current doubles rectifier and centre tapped rectifier for low electromotive force applications, ” in Proc. 21st Annu. IEEE Appl. Power Electron Conf. Expo ( APEC’06 ) , p. 7, Mar. 2006.
  9. H. Mao, S. Deng, Yawner, and I. Batarseh, “ Unified steady-state theoretical account and dc analysis of half-bridge dc-dc convertors with current doubler rectifier, ” in Proc. 19th Annu. IEEE Appl. Power Electron. Conf. Expo ( APEC’04 ) , vol. 2, pp. 786- 791, Feb. 2004.
  10. Hong Mao, Sonagquan Deng, Jaber A. Abu-Qahouq, and Issa Batarseh, “ An active-clamp snubber for stray half-bridge DC-DC convertors ” IEEE Trans. Power Electron, vol. 20, no. 6, pp. 42 – 48, Nov. 2005.
  11. Yuancheng Ren, Ming Xu, Kaiwei Yao, Yu Meng, Fred C. Lee and Jinghong Guo, “ A two Phase Approach for 12 V VR ” , IEEE Trans. Power Electron, vol. 19, no. 6, pp. 1498 – 1506, Nov. 2004.
  12. Mao Ye, Peng Xu, Bo Yang and Fred C. Lee, “ Probe of Topology Candidates for 48V VRM ” , in Proc. 17h Annu. IEEE Appl. Power Electron. Conf. Expo ( APEC’02 ) , vol. 2, pp. 699 – 705, Mar. 2002.
  13. Xunwei Zhou, Pit-Leong Wong, Peng Xu, Fred C. Lee, and Alex Q, “ Probe of Candidate VRM Topologies for Future Microprocessors ” , IEEE Trans. Power Electron. , vol. 15, no. 6, pp. 1172 – 1182, Nov. 2000.
  14. Charles E. Mullett, “ A 5-Year Power Technology Roadmap ” , in Proc. 19th Annu. IEEE Appl. Power Electron. Conf. Expo ( APEC’04 ) , vol. 1, pp. 11-17, Feb. 2004.
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